Voltage tolerant protection circuit for input buffer

Details Voltage tolerant protection circuit for input buffer Voltage tolerant protection circuit for input buffer

2007-07-03

2007-07-03

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

C326S080000, C326S081000

Reexamination Certificate

active

11143094

ABSTRACT:
An improved voltage tolerant protection circuit for input buffer comprising a transmission gate circuit receiving input from the pad for passing the input signal to the input of the input buffer, a control signal generator electrically coupled between the transmission gate circuit and the pad to provide a control signal for operating the transmission gate circuit, and an N-Well generation circuit electrically coupled between the pad and the transmission gate circuit, and also electrically coupled to the control signal generator for generating a bias signal for the transmission gate circuit and the control signal generator. Thus, the present invention provides a voltage tolerant protection circuit that prevents electrical stress on transistors, minimizes power supply consumption and transfers signals without any change in amplitude.

REFERENCES:
patent: 6768339 (2004-07-01), Von Thun et al.
patent: 2004/0141392 (2004-07-01), Lee et al.

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