Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2007-04-10
2007-04-10
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S082000, C326S083000, C326S084000
Reexamination Certificate
active
10940161
ABSTRACT:
A method and an apparatus are described for a voltage tolerant input buffer. An embodiment of an input buffer includes a differential circuit and a plurality of switches coupled with the differential circuit. The plurality of switches applies a voltage to the differential circuit in a first state and isolate the differential circuit from the voltage in a second state.
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EIA/JEDEC Standard—Aug. 1995—Electronic Industries Association High speed transceiver logic (hstl) a 1.5 v output buffer supply voltage based interface standard for digital integrated circuits.
Barnie Rexford
Blakely , Sokoloff, Taylor & Zafman LLP
Cypress Semiconductor Corporation
White Dylan
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