Voltage regulation for integrated circuit memory

Details Voltage regulation for integrated circuit memory Voltage regulation for integrated circuit memory

1999-07-13

2000-10-31

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518523, G11C 1134

Patent

active

06141252&

ABSTRACT:
An integrated circuit has an improved voltage regulator for use with memory devices that utilize secondary electron injection for programming. The memory device, typically a floating-gate EEPROM, has source and drain regions formed in a doped tub region. A first voltage source is used to reverse-bias a diode, formed in the same process as the source and drain regions of the memory device, to near the breakdown voltage. A small bias current flows through the reverse-biased diode from the first voltage source to a second voltage source, thereby establishing a reference voltage. The drain voltage of the memory device is then biased, typically by a bipolar transistor, to about a diode drop (about 0.7V) below the reference voltage, and hence correspondingly below the drain-to-tub breakdown voltage of the memory device. In this manner, the reference voltage tracks changes in the memory device due to process variations, temperature variations, etc., so that improved programming speed and/or disturb margins are obtained.

REFERENCES:
patent: 5077691 (1991-12-01), Haddad et al.

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