Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-11-14
2006-11-14
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C326S087000
Reexamination Certificate
active
07135884
ABSTRACT:
An integrated device includes a voltage mode transmit driver for matching an output impedance to an output transmission line based on a binary code, an input termination module configured for matching an input impedance to an input transmission line based on an input impedance calibration value using thermometer-based decoding. The voltage mode transmit driver includes, for each differential output signal, a resistor network circuit having pull-up circuits and pull-down circuits for changing the voltage on the differential output signal, and having binary weighted resistance values relative to each other. The input termination module includes pull-up circuits and pull-down circuits having inverse hyperbolic resistance values relative to each other, and using thermometer-based decoding to ensure a linear change in input impedance during transitions in the input impedance calibration value. A calibration circuit generates the binary code and the input impedance calibration value based on replicas of the pull-up and pull-down circuits.
REFERENCES:
patent: 6734702 (2004-05-01), Ikeoku et al.
patent: 2004/0217774 (2004-11-01), Choe
“AMD-3181™ HyperTransport™ PCI-X® Tunnel Data Sheet”, 24637 Rev. 3.02, Aug. 10, 2004, pp. 1-87.
Hypher Austen John
Scheffer Matthew
Talbot Gerald Robert
Advanced Micro Devices , Inc.
Tran Anh Q.
Turkevich Leon R.
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