Voltage level translator circuit

Electronic digital logic circuitry – Interface – Logic level shifting

Reexamination Certificate

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Details

C326S068000, C326S081000, C326S083000, C326S084000, C326S085000, C326S086000, C326S087000

Reexamination Certificate

active

07068074

ABSTRACT:
A voltage level translator circuit for translating an input signal referenced to a first voltage level to an output signal referenced to a second voltage level includes an input stage for receiving the input signal. The input stage includes at least one transistor device having a first threshold voltage associated therewith. The voltage level translator circuit further includes a latch circuit operative to store a signal representative of a logical state of the input signal. The latch circuit includes at least one transistor device having a second threshold voltage associated therewith, the second threshold voltage being greater than the first threshold voltage. A voltage clamp is operatively connected between the input stage and the latch circuit, the voltage clamp being configured to limit a voltage across the input stage based, at least in part, on a control signal presented thereto. The voltage level translator circuit includes a reference generator circuit for generating the control signal, a steady state value of the control signal being substantially equal to the first voltage level. The reference generator circuit is configured to adjust a voltage level of the control signal in response to the input signal.

REFERENCES:
patent: 5422523 (1995-06-01), Roberts et al.
patent: 6064229 (2000-05-01), Morris
patent: 6424173 (2002-07-01), Vannorsdel
patent: 6791391 (2003-01-01), Nishimura et al.
patent: 6545917 (2003-04-01), Kim
patent: 6556061 (2003-04-01), Chen et al.
patent: 6774698 (2004-08-01), Bhattacharya et al.
patent: 6924689 (2005-08-01), Randazzo et al.

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