Voltage level shifting circuit for bidirectional data

Details Voltage level shifting circuit for bidirectional data Voltage level shifting circuit for bidirectional data

2000-08-14

2002-04-16

Lam, Tuan T. (Department: 2816)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S081000, C327S333000

Reexamination Certificate

active

06373284

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates in general to voltage level shifting circuits and, more particularly, to bi-directional voltage level shifting circuits.
Recent advances in the field of semiconductor integrated circuits have brought about higher levels of integration. Semiconductor manufacturing process advancements are driving the corresponding geometric dimensions for semiconductor devices to decreasingly smaller values. As device dimensions shrink, the number of devices per unit area of semiconductor die grows. Given higher device densities within semiconductor die, a greater opportunity exists that devices, which must interface to one another, operate at incompatible drive levels.
An example of incompatible drive levels can be found in the field of digital cellular telephones where a micro-controller communicates with a smart card reader. The smart card reader interrogates the digital cellular mobile subscriber's smart card and must then relay subscriber authentication data to the micro-controller, which in turn authenticates the mobile user and returns confirmation data to the smart card. Such micro-controllers typically operate in the range of 2.7 to 6.0 volts and such smart card readers operate at approximately either 3 or 5 volts. As the two devices communicate, a series of data bits represented by logic values “0” and “1” are exchanged. A logic “0” is represented by both the smart card reader and the micro-controller as 0 volts. A logic “1”, however, is represented by 6 volts, for example, by the micro-controller and 3 volts, for example, by the smart card reader. The logic “1” must be translated by a voltage level shifting device which will translate a 6 volt logic “1” signal to a 3 volt logic “1” signal for the case when the micro-controller is attempting to communicate a logic “1” to the smart card reader. The voltage level shifting device must also be capable of translating data transmission in the opposite direction, or bi-directionally, such as is the case when the smart card reader is attempting to communicate to the micro-controller.
FIG. 1
displays prior art voltage leveling circuit
12
as required to provide adequate voltage level translation for network
10
. Prior art voltage level shifting circuit
12
is shown which translates digital voltage levels between communication devices connected to terminal D
1
and terminal D
2
Communications device connected to terminal D
1
is operating from supply potential V
dd1
and communication device connected to terminal D
2
is operating from supply potential V
dd2
where V
dd1
and V
dd2
are at different potential levels. Prior art circuit
12
is employed to translate incompatible data signals exchanged between the two communications devices. Many prior art voltage level shifting devices typically employ a single translating transistor
16
. Pass transistor
16
is typically an NMOS transistor whose symmetrical structure enables bi-directional voltage level shifting. A complex bias circuit
14
is connected to the gate of pass transistor
16
and also to the two operating voltage supplies V
dd1
and V
dd2
.
To enable the prior art voltage level shifting circuit
12
to correctly translate voltage levels between communications device connected to terminal D
1
and communications device connected to terminal D
2
, bias circuit
14
must perform the following functions. Bias circuit
14
must determine the lesser of the two operating voltages, V
dd1
or V
dd2
. Once the minimum voltage level is known, the minimum voltage level must be used to bias the gate of pass transistor
16
. The minimum gate voltage is required to bias the gate of pass transistor
16
so as to enable the data transmitted on terminals D
1
and D
2
to properly bias pass transistor
16
into its on and off state. These functional requirements imposed on bias circuit
14
render the prior art voltage leveling circuit
12
as complex and costly. In addition, the prior art voltage leveling circuit
12
does not protect against electrostatic discharge (ESD) destruction of the gate oxide of pass transistor
16
nor does it provide a method to enable or disable data transfer between terminals D
1
and D
2
.
Hence, a need exists for a voltage level shifting device which does not require complex biasing circuitry, provides for adequate ESD protection and allows for an enabling or disabling of the voltage leveling function.


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