Voltage level shifter having zero DC current and state...

Electronic digital logic circuitry – Interface – Logic level shifting

Reexamination Certificate

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Details

C326S080000

Reexamination Certificate

active

06456110

ABSTRACT:

FIELD
The present invention is related to a voltage level shifter and more particularly to a voltage level shifter having a zero DC current and state retention when in the drowsy mode.
BACKGROUND
Electronic devices of all sorts are now used in many aspects of peoples lives, both at home and in the workplace. Digital devices in particular are becoming more and more common and are used in all sorts of equipment. Integrated circuits are used not only with computer equipment but also in other electronic system. Earlier types of digital equipment using integrated circuits have used specific voltage levels such as 3.3 volts. However, for a number of reasons it is desirable to lower the voltage level used in such equipment.
In some cases, it is desirable to use a lower voltage merely to lower the amount of heat generated and in general as part of power conservation. However, the situation is even more important as portable equipment becomes more common which relies on batteries for power. Thus, it is no longer merely a question of generally reducing power output, but instead it relates directly to the portability of the device since smaller more portable batteries could be used if the power requirements were small enough. In particular, in equipment such as cellular telephones the use of smaller batteries is very important since the size of the battery will be a large factor in determining the size and weight of the telephone. Likewise, in laptop computers and other similar portable computing devices, the size and weight of the battery is an important consideration in regard to the size and weight of the overall device.
For these reasons, it is desirable to use a lower voltage level than previously. Thus, instead of using a 3.3 volt signal to indicate a digital “1”, a voltage level of 1.1. volt may be used in many cases for the same digital “1”. However, this change has not occurred in all equipment. Thus, it sometimes happens that while the microprocessor in a system has a reduced voltage, other peripheral devices such as the memory modules may not yet have been redesigned. Accordingly, it is necessary to have different voltage levels in different parts of a system. In order to do this voltage level shifters are used when going from a higher voltage area to a lower voltage area.
In addition to lowering the voltage level overall in a device, other techniques have also been used to lower the power operation in certain devices. New modes of operation have been incorporated into some devices so as to reduce power usage when the device is not in full operation. Thus, a so-called “sleep mode” has been utilized where power is shut off to entire devices when they are not in operation. A less drastic step is also sometimes used called a “drowsy mode” where the power supply is still on but the voltage is reduced so that the difference between the “1” voltage level and the “0” voltage level is smaller than it would be in normal operation. However, the use of these different modes of operation can cause difficulty in the manner in which the level shifters work. Thus, it is critical that the voltage level shifters retain the proper state of the signals, that is, that extraneous signals which may occur during the drowsy mode are ignored. Also it is important that there is zero current consumption. Prior art devices have not been able to provide such a voltage level shifter with these features.


REFERENCES:
patent: 5614847 (1997-03-01), Kawahara et al.
patent: 6246265 (2001-06-01), Ogawa

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