Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1997-11-17
2000-08-22
Nelms, David
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
36518909, 36523006, 36523008, G11C 1604
Patent
active
061082473
ABSTRACT:
A voltage generation circuit for a multivalued cell type mask ROM includes partial circuits of the same number as the row number of memory cell transistors. Each of the partial circuits includes a cell part circuit, which includes a memory cell transistor and a resistor, which is formed to have the same resistance as the resistance parasitically added to a source and a drain of a memory cell transistor. Each of the partial circuits is supplied with the same signal as the signal supplied to a corresponding word line, so that the partial circuit corresponding to the word line of a selected memory cell transistor is selected to generate a voltage interlocked with a variation in the threshold caused by a difference between the source potential and the substrate potential.
REFERENCES:
patent: 4912674 (1990-03-01), Matsumoto et al.
patent: 5278786 (1994-01-01), Kawauchi et al.
patent: 5559737 (1996-09-01), Tanaka et al.
patent: 5761149 (1998-06-01), Suzuki et al.
patent: 5838629 (1998-11-01), Kohno
Hibino Kenji
Suzu Takayuki
NEC Corporation
Nelms David
Nguyen Hien
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