Voltage clamping method and apparatus for dynamic random access

Details Voltage clamping method and apparatus for dynamic random access Voltage clamping method and apparatus for dynamic random access

1998-10-30

1999-09-07

Tran, Andrew Q.

Static information storage and retrieval

Read/write circuit

Including signal clamping

36518909, 36518911, G11C 700

Patent

active

059497203

ABSTRACT:
A circuit for clamping the voltage appearing on the bit lines of a dynamic random access memory (DRAM) device so that the voltage thereon is maintained above the low reference voltage source. The circuit includes pull-up devices connected to the bit lines of the DRAM device. The pull-up devices are active only when pull-down devices connected to the bit lines pull some of the bit lines towards the low reference voltage level.

REFERENCES:
patent: 5777934 (1998-07-01), Lee et al.
patent: 5781497 (1998-07-01), Patel et al.

Affiliated with

Also associated with

Rating

Voltage clamping method and apparatus for dynamic random access does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Voltage clamping method and apparatus for dynamic random access , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Voltage clamping method and apparatus for dynamic random access will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1810985