Voltage change reflecting delay calculation method, and...

Details Voltage change reflecting delay calculation method, and... Voltage change reflecting delay calculation method, and...

2007-01-30

2007-01-30

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10345989

ABSTRACT:
A method for designing a semiconductor integrated circuit is proposed. The semiconductor integrated circuit includes power supply terminals each formed out of an area bump and signal terminals. Distance from the logic cell or the module to a power supply area bump closest thereto is obtained for the logic cell or the module. Further, a power supply voltage which is estimated to be actually applied to the logic cell or the module is obtained based on the obtained distance and a power supply voltage applied to the power supply area bump. Finally, a delay is calculated based on the estimated power supply voltage.

REFERENCES:
patent: 2004/0153985 (2004-08-01), Paul et al.
patent: 2000-99554 (2000-04-01), None
I-Min Liu et al, Integrated Power Supply Planning and Floorplanning, Proceedings of the ASP-DAC 2001, pp. 589-594, Jan. 30, 2001.

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