Voltage boosting circuit constructed on an integrated circuit su

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327535, 327390, G05F 302

Patent

active

055215467

ABSTRACT:
A voltage boosting circuit is constructed together with a semiconductor memory device on a common substrate in an integrated circuit. The voltage boosting circuit comprises a first oscillating circuit, a boosted voltage Vpp main pumping circuit driven by the first oscillating circuit, a transmission gate for supplying Vpp in response to the output of the Vpp main pumping circuit, and a well bias supplying circuit for supplying a given bias to an isolation well on the substrate in which well the transmission gate is formed. The transmission gate includes a field effect transistor switched in common-source-amplifier configuration, rather than in common-drain-amplifier configuration, which mode of switching avoids unwanted voltage offset attributable to source-follower action. In response to drive from a second oscillating circuit, the well bias supplying circuit supplies boosted bias voltage to the isolation well, which (in order to avoid an undesirable latch-up condition) begins before the main pumping circuit boosts the voltage Vpp supplied to the semiconductor memory device as operating potential.

REFERENCES:
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patent: 4961007 (1990-10-01), Kumanoya et al.
patent: 5187397 (1993-02-01), Nishimori et al.
patent: 5283764 (1994-02-01), Kim et al.
patent: 5367489 (1994-11-01), Park et al.
patent: 5408140 (1995-04-01), Kawai et al.
"A 35 ns 64 Mb Dram Using On-chip Boosted Power Supply", D. J. Lee et al, 1992 Symposium on VLSI Circuits Digest of Technical Papers, pp. 64-65.

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