Voltage balancing circuit for memory systems

Static information storage and retrieval – Read/write circuit – Complementing/balancing

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365154, 365179, G11C 700

Patent

active

045557764

ABSTRACT:
A voltage balancing circuit, particularly suitable for bipolar memory arrays producing small signals, is provided which includes first and second conductive lines, a point of reference potential, a first device disposed between the first conductive line and the point of reference potential, a second device disposed between the second conductive line and the point of reference potential, first and second transistors, first means for coupling the first line through the first transistor to the second line, second means for coupling the second line through the second transistor to the first line, and means for supplying substantially equal signals to the control electrodes of the first and second transistors. When used in a memory array, the conductive lines are the bit/sense lines, the point of reference potential is a bit/sense line reference voltage and the equal signals for the control electrodes of the transistors are provided in response to a signal from a bit decoder.

REFERENCES:
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patent: 3949383 (1976-04-01), Askin et al.
patent: 4090255 (1978-05-01), Berger et al.
patent: 4125878 (1978-11-01), Watanabe
patent: 4158237 (1979-06-01), Wiedmann
patent: 4272834 (1981-06-01), Noguchi et al.
patent: 4280198 (1981-07-01), Heuber et al.
patent: 4302823 (1981-11-01), Gersbach et al.
patent: 4404662 (1983-09-01), Masenas, Jr.
Proceedings of IEE-vol. 120, No. 10, Oct. 1973, pp. 1212-1215.

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