Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2002-09-03
2004-06-15
Yoha, Connie C. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230030, C365S233100, C365S096000
Reexamination Certificate
active
06751145
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention:
The invention lies in the semiconductor technology field. More specifically, the invention relates to a volatile semiconductor memory having memory cells which are arranged on a semiconductor substrate and are connected to word lines and to bit lines which intersect the word lines. Further,
the semiconductor memory is divided into a plurality of memory segments, and only memory cells, each of a single memory segment, are connected to each word line and to each bit line;
the semiconductor memory has a circuit by way of which it is possible to set the length of a time interval after the expiration of which the memory contents of memory cells are refreshed; and
the circuit for each memory segment has a subcircuit which is assigned to this memory segment and by way of which a time interval which is specific to this memory segment, for the refreshing of the memory contents of this memory segment can be set.
Semiconductor memories, i.e. memory circuits which are manufactured by means of microelectronic semiconductor structures, can be divided into volatile and nonvolatile semiconductor memories. Volatile semiconductor memories require, for the storage of information, an external operating voltage which must be continuously maintained during the memory process if stored information is not to be lost. Such semiconductor memories, which are also referred to as random access memories (RAMs), are used, for example, as working memories in computers and other electronic devices. They permit information to be stored during use, i.e. while the computer or the electronic device is operating. When the operating voltage is switched off, information stored in a volatile semiconductor memory is lost.
On the other hand, nonvolatile semiconductor memories, in particular ROMs (read only memories), are used to store information over a relatively long time. Nonvolatile memories store information even if there is no external operating voltage present.
The volatile semiconductor memories considered here have, for the storage of information, integrated capacitors which are usually manufactured in trenches (deep trenches) which extend deep under the surface of a semiconductor substrate and store charge quantities over a limited time. A volatile semiconductor memory has a multiplicity of memory cells which are arranged on the semiconductor substrate and each have such a capacitor and at least one selection transistor each. In order to drive the memory cells electrically, word lines and bit lines which intersect the word lines are provided. Each memory cell is connected to a word line and to a bit line and can be driven by means of these lines. The selection transistors of the memory cells are connected by means of their electrodes to the word lines and bit lines.
If the selection transistor is, for example, a MOSFET (metal oxide semiconductor field effect transistor), the gate electrode is usually connected to a word line (first line) and a source/drain electrode to a bit line (second line). The remaining source/drain electrode is connected to a terminal of the capacitor. The selection transistor can be switched, and the capacitor thus charged or discharged, by means of suitable voltages at the word line and the bit line to which the memory cell is connected. As a result, information is stored or overwritten.
The various memory cells are arranged on the surface of the semiconductor substrate in the form of a grid, the word lines and the bit lines which are used to drive their memory cells electrically extending in the form of a network of intersecting lines. In this way, each memory cell can be driven, i.e. switched, using a word line and a bit line.
In volatile semiconductor memories, information can be stored only over a relatively short time period of the order of magnitude of milliseconds. The reason for this is leakage currents which occur in the memory circuit and as a result of which charges stored in the capacitors gradually flow away. In order to maintain the stored information, these charges must be refreshed. This is done by reading out the memory cells at short, regular intervals and overwriting them with the same information as before but with a higher signal strength. By means of this reconditioning, a larger charge quantity than before is written into those memory capacitors wherein charges are stored before such a refresh. The next refresh takes place before this charge quantity has disappeared due to leakage currents from the memory capacitor.
The recharging processes which are performed at short intervals in order to refresh stored information are carried out only while the volatile semiconductor memory is operating, i.e. for as long as the memory is supplied with its operating voltage. This leads to a certain consumption of power even if no new information is stored but rather only already stored information is being maintained. In order to keep the consumption of power low, particularly in mobile devices, efforts have been made to keep leakage currents as small as possible, and to make the time interval after the expiry of which the memory contents of the memory cells have to be refreshed as long as possible.
The time interval between successive refreshes is, however, upwardly limited owing to the speed at which memory capacitors become emptied. A certain fraction of the stored charge quantities must still be stored if a refresh is performed for the originally present storage charge to be still detected as such. If, on the other hand, a refresh of this information does not take place frequently enough, i.e. quickly enough, the reliability of the storage is lost.
The decay behavior of the storage charge and the duration of the storage vary from memory cell to memory cell. They are influenced by a multiplicity of manufacturing-conditioned fluctuations. Therefore, in practice each semiconductor memory is tested before being put into operation to determine the time interval for which information is still reliably stored between successive refreshes. A sufficiently short refresh interval is subsequently set. For this purpose, the semiconductor memory has a circuit by means of which the length of the time interval after the expiry of which the memory contents of the memory cells are refreshed, i.e. the length of the refresh interval, can be set.
The consumption of power which is brought about by the repeated conditioning of memory information is disadvantageous in a volatile semiconductor memory. Although the time period after which memory information is regularly reconditioned can be prolonged overall, this is however at the cost of the reliability of the storage. As the leakage currents and memory times which vary from cell to cell are mainly caused by statistical fabrication fluctuations, selective change of the reconditioning time is-possible only at the cost of the storage reliability. If a constant storage reliability is to be ensured, a specific minimum frequency of the reconditioning of the stored information is necessary. However, this increases the consumption of power while the volatile semiconductor memory is operating.
It is known to provide circuits in order to set the reconditioning times on a memory-segment-specific basis. Such circuits have subcircuits which are assigned to the memory segments and with which the refresh times of the segments can be individually set. In this context, a plurality of identical subcircuits are set in accordance with the number of memory segments.
The multiple provision of identical subcircuits requires more chip area than necessary if each subcircuit brings about refreshing of the assigned memory segment with the segment-specific refresh time independently of the other subcircuits.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a volatile semiconductor memory and a mobile device, which overcome the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provide for a semiconductor memory wherein different segm
Feurle Robert
Savignac Dominique
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
Yoha Connie C.
LandOfFree
Volatile semiconductor memory and mobile device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Volatile semiconductor memory and mobile device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Volatile semiconductor memory and mobile device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3330896