Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate
2009-02-27
2011-12-20
Hidalgo, Fernando (Department: 2827)
Static information storage and retrieval
Systems using particular element
Flip-flop
C365S049110, C365S156000, C365S174000, C365S189160, C365S189050, C365S189110, C365S202000, C365S230060, C365S230030, C365S230080, C365S233160, C365S233170
Reexamination Certificate
active
08081503
ABSTRACT:
Arrays of memory elements may have data lines and address lines. Each memory element may have five transistors. An address decoder may receive an undecoded address signal and may produce a corresponding decoded address signal. The decoded version of the address signal may be used in addressing the memory elements in the memory array. The memory array may be loaded with configuration data. Loaded memory elements may each provide a static output control signal that configures a programmable logic transistor in programmable logic. The memory elements may be powered with an elevated voltage during normal operation. Boosted address signals may be used when addressing the memory array. The address decoder may contain circuitry that is responsive to a clear control signal and an address output enable signal. The memory element array may be cleared by asserting the clear control signal and address output enable signal.
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Lin-Shih Lui et al. U.S. Appl. No. 12/057,343, filed Mar. 27, 2008.
Nguyen Andy
Yu Ling
Altera Corporation
Hidalgo Fernando
Treyz G. Victor
Treyz Law Group
Tsai Jason
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