Volatile memory and embedded dynamic random access memory

Details Volatile memory and embedded dynamic random access memory Volatile memory and embedded dynamic random access memory

1998-11-06

2000-02-22

Nelms, David

Static information storage and retrieval

Read/write circuit

Data refresh

36523003, G11C 700

Patent

active

060288051

ABSTRACT:
Provided is a structure in which a refresh region to be actually refreshed can be set on an outside of a DRAM. A refresh control register (21) is provided to store a refresh control bit which is sent from the outside and indicates the region to be refreshed. A refresh address deciding circuit (22) is provided to compare a content (RCB) stored in the refresh control register (21) with a refresh address (RAi) output from a refresh address generating circuit (11). An internal timing control circuit (5A) stops operations of a row decoder (3) and a sense amplifier (4) according to a result of a decision made by the refresh address deciding circuit (22).

REFERENCES:
patent: 5499213 (1996-03-01), Niimi et al.
patent: 5555527 (1996-09-01), Kotani et al.
patent: 5586287 (1996-12-01), Okumura et al.
patent: 5835937 (1998-11-01), Miyoshi
patent: 5901101 (1999-05-01), Suzuki et al.

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