Void free solder arrangement for screen printing...

Details Void free solder arrangement for screen printing... Void free solder arrangement for screen printing...

2005-02-26

2008-08-26

Smith, Zandra V. (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S615000, C438S706000, C438S106000, C257SE21002

Reexamination Certificate

active

07416969

ABSTRACT:
A process for the production of a void-free semiconductor wafer for the electronics industry, comprising the steps of: applying a coating of a solder paste to a semiconductor wafer through a photoresist film; heating and applying a vacuum to the wafer in a reflow furnace with a controlled formic acid vapor ambient to for a first reflow to remove the flux and form void free solder bumps on the wafer; processing the wafer to remove the photoresist film; heating the wafer in a reflow furnace with a controlled formic acid vapor ambient for a second reflow to remove surface oxides from the wafer and to form the solder into final void free metal solder bumps.

REFERENCES:
patent: 5855465 (1999-01-01), Boitnott et al.
patent: 6344407 (2002-02-01), Matsuki et al.
patent: 6596618 (2003-07-01), Narayanan et al.
patent: 6605524 (2003-08-01), Fan et al.
patent: 10107413 (1998-04-01), None

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