VMOS Field aligned dynamic ram cell

Details VMOS Field aligned dynamic ram cell VMOS Field aligned dynamic ram cell

1979-01-08

1980-07-22

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Semiconductive

357 55, 365149, G11C 1140, G11C 1124

Patent

active

042143128

ABSTRACT:
A semiconductor memory core structure comprised of an array of cells each having a single IGFET device formed in a recess located on one side of a diffused bit line and directly above a buried storage capacitor. The diffused bit line forms one source or drain region while the buried storage capacitor forms the other source and drain region. With the channel and gate between the two source and drain regions located on only one sidewall of the recess, the gate to drain and bit line capacitance is reduced, thereby providing increased signal power and a higher signal level to a sense amplifier than heretofore available.

REFERENCES:
patent: 4003036 (1977-01-01), Jenne
Altman, Preview of ISSCC Excites Designers, Electronics, 12/75, pp. 50-51.

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