Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-05-10
2005-05-10
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S795000, C714S796000
Reexamination Certificate
active
06892344
ABSTRACT:
A Viterbi equalizer includes a digital signal processor with has a first and a second associated hardware data path. The first data path is intended for carrying out ACS operations and calculates state metrics of target states in a trellis diagram. Depending on the configuration, the second hardware data path calculates either transition metrics from previous states to target states in the trellis diagram, or soft output values.
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Dildine R. Stephen
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
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