Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
2000-12-18
2004-11-16
Chin, Stephen (Department: 2634)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C369S059220
Reexamination Certificate
active
06819724
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to Viterbi decoder and Viterbi decoding method and more particularly to a Viterbi decoder and Viterbi decoding method for decoding recorded data from such a digital recording medium as optical disc and magneto-optic disc.
2. Description of the Related Art
In a reproducing apparatus for such a digital recording medium as optical disc and magneto-optic disc, asymmetry occurs in reproduced signal due to length or depth of a recording pit. Thus, conventionally, there has been often used an apparatus (auto slicer) for controlling a slicing level of a detecting circuit for detecting a digital signal by slicing the reproduced signal according to a predetermined threshold, based on the asymmetry of the reproduced signal. Further, Japanese Patent Application Laid-Open No. H6-150549 has disclosed “optical information reproducing apparatus” in which to make the Viterbi decoder correspond to the asymmetry of the reproduced signal, asymmetrical rate of pit information is detected, correction pit information is generated based on this asymmetry rate and this correction pit information is decoded by the Viterbi decoder.
However, according to the aforementioned Japanese Patent Application Laid-Open No. H6-150549, changes of characteristics in a recording area cannot be followed unless any other ways than correcting of an area in which known pits are recorded are employed. Specifically, it is estimated that this invention cannot be applied to a rewritable medium.
FIG. 1
shows a result of sampling excellently symmetrical reproduced signals at bit cycle T, namely, measuring a histogram of signal values at an input position to a Viterbi decoder, for a level (signal value) of the reproduced waveform to be, for example, substantially −2, −1, 0, 1, 2 by equalizing the waveform of, for example, solitary wave having 1T (T is bit length) width, so that a response waveform has a value of substantially 1, 1, 1, 1, namely, a so-called transmission characteristic has partial response (hereinafter referred to as) PR (1, 1, 1, 1).
However, depending on excessive or low power at the time of recording and/or characteristic changes of a medium, non-linear distortion occurs so that waveform equalization to PR (1, 1, 1, 1) is very difficult. Consequently, nothing but a reproduced waveform having inferior symmetry as shown in
FIG. 2
can be obtained. In the example of
FIG. 2
, although a waveform equalizer is actuated so as to converge waveform to level of −2, −1, 0, 1, 2, samples which should be converged to level 2 disperse largely. A conventional Viterbi decoder cannot conduct excellent decoding operation for an input wave having such a large non-linear distortion.
SUMMARY OF THE INVENTION
The present invention has been achieved in views of the above described problem, and therefore, an object of the invention is to provide a Viterbi decoder and Viterbi decoding method capable of maintaining excellent reproduction performance even if unevenness in recording mark shape due to recording power or medium characteristic or non-linear distortion in reproduced waveform due to reproduction characteristic occurs when reproducing data recorded in a recording medium.
To achieve the above described object, there is provided a Viterbi decoder comprising: a branchmetric operating circuit for conducting branchmetric operation for input data using plural target values so as to generate a selection signal; a path memory for outputting decoded data series produced by Viterbi-decoding the input data based on the selection signal outputted from the branchmetric operating circuit; a data estimating circuit for outputting estimation data estimating an input data at a time earlier by a predetermined bit cycle than the input data based on the decoded data series outputted from the path memory; and a target value computing means for correcting the target values with a difference between the estimation data outputted from the data estimating circuit and the input data, as a target value error, and outputting obtained plural first target values to the branchmetric operating circuit as the plural target values.
According to the present invention, plural target values used in the branchmetric operating circuit are not fixed values but first target values corrected depending on a target value error which is a difference between the estimation data obtained by the data estimating circuit and the target value computing means and input data. Therefore, the branchmetric operation can be conducted based on the plural first target values near plural averages having the highest incidence (having peaks in histogram).
According to a preferred embodiment of the present invention, the target value computing means holds plural initial target values preliminarily and when operation starts or error operation (control loop) is not converged yet, outputs the plural initial target values to the branchmetric operating circuit as the plural target values.
According to the present invention, the branchmetric operation can be conducted based on plural initial target values when operation starts or error operation (control loop) is not converged yet.
According to another preferred embodiment of the present invention, the target value computing means comprises: a target value computing circuit for generating the plural first target values with a difference between the estimation data outputted from the data estimating circuit and the input data as a target value error; a target value correcting circuit for generating plural second target values as corrected target values corresponding respectively to the plural first target values so that respective target values are symmetrical with respect to a target value which is a median of the plural first target values; and a selecting means for if the target value error obtained by the target value computing circuit is equal to or less than a predetermined threshold, outputting the plural first target values to the branchmetric operation circuit and if the target value error exceeds the threshold, outputting the plural second target values to the branchmetric operating circuit.
According to the present invention, if the equalization waveform (input data) to be inputted to the Viterbi decoder is distorted largely, the target value error exceeds the threshold largely. Thus, the plural second target values are outputted to the branchmetric operating circuit so as to conduct branchmetric operation. The second target values are corrected target values corresponding to the plural first target values so that respective target values are symmetrical with respect to a target value which is a median of the plural first target values.
Further, to achieve the above described object, there is provided a Viterbi decoding method comprising: first step of generating a selection signal by conducting branchmetric operation using plural target values for input data; second step of outputting decoded data series produced by Viterbi-decoding the input data based on the selection signal; third step of outputting estimation data estimating input data at a time earlier by a predetermined bit cycle than the input data based on the decoded data series; and fourth step of correcting the target values with a difference between the estimation data and the input data, as a target value error, and using obtained plural corrected target values as the plural target values.
According to the present invention, the plural target values used for the branchmetric operation are not fixed values, but target values corrected in the fourth step depending on a target value error which is a difference between the estimation data obtained in the third step and the input data. Therefore, the branchmetric operation can be conducted based on plural target values near plural averages having the highest incidence (having peaks in histogram).
The nature, principle and utility of the invention will become more apparent from the following detailed description whe
Hayami Atsushi
Oki Tsuyoshi
Berkowitz Marvin C.
Chin Stephen
Nath & Associates PLLC
Raphael Jarrod N.
Victor Company of Japan , Limited
LandOfFree
Viterbi decoder and Viterbi decoding method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Viterbi decoder and Viterbi decoding method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Viterbi decoder and Viterbi decoding method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3328422