Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent
1997-04-07
2000-03-21
Baker, Stephen M.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
H03M 1300, H03M 1312
Patent
active
060414332
ABSTRACT:
The present invention provides an improved Viterbi decoder with a trace-back memory that requires a much less storage capacity required for signal decoding processing as compared with a commonly-used trace-back memory. Based on an input received code, an add-compare-select (ACS) circuit generates path select (PS) signals, and m generated PS signals per unit are written into a path storing means and are fed to a starting node number deciding circuit where the number m indicates a trace-back length. The starting node number deciding circuit finds from the m PS signals a trace-back starting node number for a PS signal preceding the m PS signals. PS signals are read out from the path storing means, trace-back processing starts from the starting node number found by the starting node number deciding circuit, and signal decoding processing is carried out. This eliminates the need for providing a state of performing provisional trace-back processing for finding a starting node number, thereby reducing the number of states necessary for the decoding of signals from four down to three. This reduces the storage capacity of memory required for storing PS signals and thereby achieves a considerable reduction of the circuit size.
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Baker Stephen M.
Matsushita Electric - Industrial Co., Ltd.
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