Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-09-12
2006-09-12
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07107571
ABSTRACT:
A system and method of analyzing defects on a mask used in lithography are provided. A defect area image is provided as a first input, a set of lithography parameters is provided as a second input, and a set of metrology data is provided as a third input. The defect area image comprises an image of a portion of the mask. A simulated image can be generated in response to the first input. The simulated image comprises a simulation of an image that would be printed on a wafer if the wafer were exposed to a radiation source directed at the portion of the mask. The characteristics of the radiation source comprise the set of lithography parameters and the characteristics of the mask comprise the set of metrology data.
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Chang Fang-Cheng
Karklin Linard
Pati Yagyensh C.
Wang Yao-Ting
Beaver, Hoffman & Harms LLP
Harms Jeanette S.
Siek Vuthe
Synopsys Inc.
Tat Binh
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