Virtualized load buffers

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C711S137000, C711S138000, C711S144000, C711S166000

Reexamination Certificate

active

07346735

ABSTRACT:
A memory addressing technique using load buffers to improve data access performance. More particularly, embodiments of the invention relate to a method and apparatus to improve cache access performance in a computer system by exploiting addressing mode information within an instruction accessing a cache memory or other memory device within the computer system.

REFERENCES:
patent: 6314504 (2001-11-01), Dent
patent: 6535962 (2003-03-01), Mayfield et al.
David Patterson and John Hennessy, Computer Architecture A Quantitative Approach 1996, Morgan Kaufmann Publishers, Second Edition, pp. 658-666.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Virtualized load buffers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Virtualized load buffers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Virtualized load buffers will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3960645

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.