Virtualized load buffers

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S137000, C711S138000, C711S144000, C711S166000

Reexamination Certificate

active

10821549

ABSTRACT:
A memory addressing technique using load buffers to improve data access performance. More particularly, embodiments of the invention relate to a method and apparatus to improve cache access performance in a computer system by exploiting addressing mode information within an instruction accessing a cache memory or other memory device within the computer system.

REFERENCES:
patent: 6314504 (2001-11-01), Dent
patent: 6535962 (2003-03-01), Mayfield et al.
David Patterson and John Hennessy, Computer Architecture A Quantitative Approach 1996, Morgan Kaufmann Publishers, Second Edition, pp. 658-666.

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