Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Virtual machine memory addressing
Reexamination Certificate
2003-06-30
2008-08-05
Bragdon, Reginald G. (Department: 2189)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Virtual machine memory addressing
C711S209000
Reexamination Certificate
active
07409487
ABSTRACT:
A virtual computer system including multiple virtual machines (VMs) is implemented in a physical computer system that uses address space identifiers (ASIDs). Each VM includes a virtual translation look-aside buffer (TLB), in which guest software, executing on the VM, may insert address translations, with each translation including an ASID. For each ASID used by guest software, a virtual machine monitor (VMM), or other software unit, assigns a unique shadow ASID for use in corresponding address translations in a hardware TLB. If a unique shadow ASID is not available for a newly used guest ASID, the VMM reassigns a shadow ASID from a prior guest ASID to the new guest ASID, purging any entries in the hardware TLB corresponding to the prior guest ASID. Assigning unique shadow ASIDs limits the need for TLB purges upon switching between the multiple VMs, reducing the number of TLB miss faults, and consequently improving overall processing efficiency.
REFERENCES:
patent: 5295251 (1994-03-01), Wakui et al.
patent: 5555385 (1996-09-01), Osisek
patent: 2003/0120856 (2003-06-01), Neiger et al.
Chen Xiaoxin
Munoz Alberto J.
Rihan Sahil
Bragdon Reginald G.
Ruiz Aracelis
Smith Darryl A.
VMware, Inc.
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