Virtual to physical memory address mapping within a system...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Details

C711S203000, C711S206000, C711S207000, C711S163000

Reexamination Certificate

active

07124274

ABSTRACT:
An apparatus for processing data, the apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including at least one secure mode being a mode in the secure domain; and at least one non-secure mode being a mode in the non-secure domain. When the processor is executing a program in a secure mode, the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor further includes a non-secure translation table base address register and a secure translation table base address register operable in the non-secure and secure domain, respectively, to indicate a region of memory storing either non-secure or secure domain memory mapping data defining how virtual addresses are translated to physical addresses within either the non-secure or secure domain.

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