Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
1999-06-30
2001-02-13
Nguyen, Tan T. (Department: 2818)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S049000, C365S225700
Reexamination Certificate
active
06188242
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a programmable device, such as a field programmable gate array, and in particular to a programmable device and a method of programming that permits the functional size of the programmable device to be altered.
BACKGROUND
Programmable devices, such as programmable logic arrays or field programmable gate arrays, are well known in the art. These devices offer high performance and flexibility of design for the user. Programmable devices typically consist of many repeated portions or “macrocells,” which include modules of logic elements and programmable interconnect structures. The logic elements and programmable interconnect structures may be programmed to be interconnected in various configurations as desired by the user.
FIG. 1
shows a schematic view of a conventional programmable device
10
. Programmable device
10
is shown with five rows and five columns logic elements, referred to herein as logic blocks
12
, and a plurality of interconnecting conductors
14
, shown schematically as lines. Of course, conventional programmable devices typically have many more logic blocks than shown in
FIG. 1. A
plurality of input/output (“I/O”) pins
16
are also shown in FIG.
1
. Conductors
14
are connected to programmable antifuses (not shown) that may be programmed to interconnect particular logic blocks
12
and I/O pins
16
in various configurations as desired by the user.
To configure a programmable device, the user configures the interconnect structures, i.e., conductors
14
and antifuses (not shown) so that selected input terminals and selected output terminals of selected on-chip circuit components, i.e., logic blocks
12
, are electrically connected together in such a way that the resulting circuit is the user-specific circuit desired by the user. In a programmable device employing, for example, amorphous silicon antifuses, selected amorphous silicon antifuses disposed between selected wire segments are “programmed” to connect the selected wire segments together electrically. Which antifuses are programmed and which antifuses are left unprogrammed determines how the circuit components are interconnected and therefore determines the resulting circuit.
A field programmable gate array (an “FPGA”) is one type of programmable device. For background information on field programmable gate arrays that employ antifuses, see: “Field Programmable Gate Array Technology” edited by Stephen Trimberger, 1994, pages 1-14 and 98-170; “Field-Programmable Gate Arrays” by Stephen Brown et al., 1992, pages 1-43 and 88-202; “Practical Design Using Programmable Logic” by David Pellerin and Michael Holley, 1991, pages 84-98; the 1995 QuickLogic Data Book, 1995, pages 1-5 through 2-11 and 6-3 through 6-18; the 1998 QuickLogic Data Book, 1998, pages 1-5 through 2-16; the 1995 Actel FPGA Data Book and Design Guide, 1995, pages ix-xv, 1-5 through 1-34, 1-51 through 1-101, 1-153 through 1-22, 3-1 through 4-56; U.S. Pat. No. 5,424,655 entitled “Programmable Application Specific Integrated Circuit Employing Antifuses and Methods Therefor”. The contents of these documents are incorporated herein by reference.
Currently, programmable devices are available in many different sizes, i.e., with a different number of logic blocks
12
, each size being a separate product line. For example, programmable devices are available with as many as 1584 logic blocks
12
and as few as 96 logic blocks
12
. Thus, a user may purchase large programmable devices or smaller programmable devices depending on the desired application.
As with any silicon device, programmable devices are costly to design and manufacture. Each different product line of programmable devices requires a different design and specialized tooling, such as masks. Thus, every time a manufacturer creates a different sized programmable device, the manufacturer must incur the expense of engineering, designing, and tooling the new device. Moreover, producing a new product line is time consuming. A period of several months or longer may pass between the decision to produce a different sized programmable device and the actual production of that device.
Unfortunately, the manufacturer does not always know if there is an adequate demand for a new product line. Moreover, while there may be some demand for the product, the demand may be too small for the manufacturer to recoup the costs that are incurred in producing an entirely new product line. Thus, the manufacturer may incur the costs of producing a new product line that does not have enough demand to support it. Further, if there is a high demand for a different sized programmable device, considerable time may be spent by the manufacturer in evaluating the market demand, designing, and producing the new product line. Consequently, the manufacturer may lose valuable market share.
Thus, there is a need for a programmable device and a method of programming so that a single programmable device may be easily and quickly converted to different product lines.
SUMMARY
A programmable device, in accordance with an embodiment of the present invention, includes signature bits that indicate whether the device is a “virtual” programmable device, wherein a virtual programmable device has fewer than all the logic blocks accessible to the user. Thus, a virtual programmable device is functionally smaller than the base programmable device, i.e., the programmable device when it is not a virtual device. A single programmable device may be used in different product lines. A data file corresponding to the signature bits identifies whether all the logic blocks or fewer than all the logic blocks may be used when the user maps the desired circuit on the virtual programmable device.
The signature bits may be programmed by the manufacturer after the programmable device is manufactured. In another embodiment, the signature bits are hard wired during the manufacture of the programmable device. Thus, the manufacturer may produce different sized programmable devices by simply altering the signature bit. Consequently, the manufacturer is not required to design and generate separate tooling for each new product line. Further, the manufacturer may easily control inventory by appropriately programming the signature bits.
The programming process of the programmable device uses a programming unit that identifies the configuration of the signature bit. The mapping software limits the number of logic blocks that may be used. Programming of the programmable device is conventionally performed, except that (depending on whether the device is a virtual device) not all the logic blocks may be accessed. After identifying the signature bits, the programming unit ensures that the restricted logic blocks in a virtual programmable device are not used.
In addition, during the placement process the user typically maps a desired design onto the programmable device. To prevent user confusion regarding how many and which logic blocks are accessible, the users, view of the programmable device does not include the restricted logic blocks. Thus, the user is presented with a view of the programmable device that is uncluttered with inaccessible logic blocks, routing resources, and I/O cells (associated with I/O pins). The users' view of the virtual programmable device will show the device as actually having fewer logic blocks. The mapping of the design onto the programmable device by the user is conventionally stored on a file which is downloaded to the programming unit. The programming unit then programs the programmable device in accordance with the mapping file.
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Mahajan Shekhar Y.
Shao Wenyi
Halbert Michael J.
MacPherson Alan H.
Nguyen Tan T.
QuickLogic Corporation
Skjerven Morrill & MacPherson LLP
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