Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-01-16
2009-12-01
Lane, Jack A (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S003000, C711S203000
Reexamination Certificate
active
07627734
ABSTRACT:
A “virtual on-chip memory” that provides advantages as compared to an on-chip memory that utilizes a cache. In accordance with the invention, when a CPU attempts to access a memory address that is not on-chip, the access is aborted and the abort is handled at a page level. A single page table is utilized in which each entry constitutes an address in the virtual address space that will be mapped to a page of on-chip memory. The CPU obtains the missing data, updates the page table, and continues execution from the aborted point. Because aborts are handled at the page level rather than the line level, the virtual on-chip memory is less expensive to implement than a cache. Furthermore, critical real-time applications can be stored within a non-virtual portion of the memory space to ensure that they are not stalled.
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Broadcom Corporation
Lane Jack A
Sterne Kessler Goldstein & Fox PLLC
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