Virtual multiple-read port memory array

Details Virtual multiple-read port memory array Virtual multiple-read port memory array

1996-01-26

1997-04-15

Clawson, Jr., Joseph E.

Static information storage and retrieval

Addressing

Multiple port access

36518902, 36523002, 36523006, G11C 802

Patent

active

056216963

ABSTRACT:
Multiple reads are made from an array of single-read port memory cells. An array of single-read port memory cells is provided with "steering" devices located between a column of cells and the output drivers for the array. The steering devices are controlled by the read pointers such that the steering signal for a given output configuration is active only when read pointers for that output configuration are active. To complete the function, the read pointers are fed to OR gates, one per row, so that a given pointer will activate the read port of a plurality of consecutive memory cells. The read pointers represent the decoded read address and only one is active at a time.

REFERENCES:
patent: 5544122 (1996-08-01), Mizukami et al.

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