Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Reexamination Certificate
2005-06-07
2005-06-07
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C719S321000, C711S114000
Reexamination Certificate
active
06904477
ABSTRACT:
A processor-based system (200) with a multipath I/O architecture, including a virtual host controller interface (vHCI) layer (280) between a common architecture layer (270) and a physical host controller interface layer (290), which may include convential host bus adapters (HBAs) coupled to target decives such as storage devices (240, 250) in a storage area network (SAN). Target drivers send I/O requests to a common architecture layer, which forwards them to the vHCI layer (280), which then sends them to HBAs for sending to the target devices (240, 250). A multipathing driver interface (MPXIO) layer (310) resides beneath the vHCI layer (280), and determines target device path information for the vHCI layer (280). Positioning the MPXIO layer (310) beneath the vHCI layer avoids the need for multipathing target drivers (360) above the common architecture layer. A failover operations module may be provided for each type of target device to provide the vHCI layer (280) with failover protocol information in the event of a failed path.
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Danielson John H.
Padmanabhan Seetharaman
Seshadri Chitrank
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Huynh Kim
Kim Harold
Sun Microsystems Inc.
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