Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2011-01-04
2011-01-04
Bragdon, Reginald G (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C718S104000, C718S105000
Reexamination Certificate
active
07865686
ABSTRACT:
Provided is a virtual computer system capable of finding a configuration whose total sum of memory access delays is smaller than that of a current configuration. In a virtual computer system in which with memory access times within a node and between nodes differing from each other, a hypervisor controls a plurality of virtual processors which execute a process on a plurality of nodes, the hypervisor includes a unit which obtains a total sum of memory access delay time on the virtual machine based on affinity information indicative of a latency or a band of communication between the virtual processors and traffic between the virtual processors, and a unit which reconfigures physical resources based on the total sum of delay time.
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Japanese Official Action - 2006-077930 - Nov. 2, 2010.
Ahmed Hamdy S
Bragdon Reginald G
NEC Corporation
Young & Thompson
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