Television – Image signal processing circuitry specific to television – Dc insertion
Patent
1992-04-07
1994-08-23
Peng, John K.
Television
Image signal processing circuitry specific to television
Dc insertion
348691, H04N 518, H04N 516, H04N 972
Patent
active
053412184
ABSTRACT:
A video signal clamping circuit capable of maintaining a DC level of a digital video signal at a fixed level, in which a pedestal level in a vertical blanking period of the digital video signal after an A/D conversion is sampled, and an average value of a plurality of sampling data in a plurality of fields is calculated by an average value calculator. The average value is compared with a predetermined clamp level reference value by a comparison output circuit, and depending on the comparison result, a signal either added or subtracted by a certain width to or from an output signal of a predetermined period before is output for automatically controlling a clamp voltage.
REFERENCES:
patent: 4473864 (1984-09-01), Mackereth
patent: 4562471 (1985-12-01), Eouzan et al.
patent: 4691235 (1987-09-01), Okui
patent: 4742392 (1988-05-01), Hashimoto
patent: 4970594 (1990-11-01), Kitaura et al.
patent: 5057920 (1991-10-01), Wilkinson
Item 1(a) Japanese Printed Publication 3-35,666 A. In: Patents Abstr. of Japan, Sect. E., vol. 15 (1991), No. 165 (E-1061).
Inoue Sadayuki
Kaneko Hideki
Ookuma Ikuo
Mitsubishi Denki & Kabushiki Kaisha
Peng John K.
LandOfFree
Video signals clamping circuit for maintaining DC level of video does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Video signals clamping circuit for maintaining DC level of video, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Video signals clamping circuit for maintaining DC level of video will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-506661