Static information storage and retrieval – Addressing – Multiple port access
Patent
1989-05-16
1991-11-12
Popek, Joseph A.
Static information storage and retrieval
Addressing
Multiple port access
36523009, 365239, G11C 800
Patent
active
050653687
ABSTRACT:
An implementation of a serial access memory register that facilitates the selecting from two alternate frame buffers on a per pixel basis. The frame buffers are each stored in a portion of a row in a single video RAM. Following data transfer to the serial access memory register, data from each of the two frame buffers is available. A double buffer select signal controls the selection of which half of the serial access memory register will put data on the output bus for each serial clock signal. The serial clock increments the address pointers in both halves of the serial access memory port simultaneously.
REFERENCES:
patent: 4825411 (1989-04-01), Hamano
patent: 4855959 (1989-08-01), Kobayashi
Gupta Satish
Henderson Randall L.
Hiltebeitel Nathan R.
Tamlyn Robert
Tomashot Steven W.
International Business Machines - Corporation
Kinnaman, Jr. W. A.
Popek Joseph A.
Walker M. S.
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