Video controller and video control method for chopping and shrin

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

395107, 358447, 358448, 358452, 345112, 345127, 345130, G06F 1500, H04N 140, G09G 500, G09G 526

Patent

active

058871233

ABSTRACT:
A video controller and related method for controlling a manner in which input data is printed is provided. Specifically, the controller contains a first AND gate, a buffer, a second AND gate, a third AND gate, and a bus holder. The first AND gate inputs the input data and a chopping control signal and outputs a corresponding chopping output signal. The buffer inputs delayed input data and a buffer control signal. The delayed input data corresponds to the input data which has been delayed for a predetermined period of time, and the buffer outputs the delayed input data as a shrinking control signal in accordance with the buffer control signal. The second AND gate inputs the shrinking control signal and the input data and outputs a corresponding shrinking output signal. The third AND gate inputs the chopping output signal and the shrinking output signal and outputs corresponding output data. Finally, the bus holder maintains an output state of the buffer at an appropriate level.

REFERENCES:
patent: 4148066 (1979-04-01), Saylor
patent: 4163260 (1979-07-01), Hisao et al.

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