Via programmable gate array with offset bit lines

Details Via programmable gate array with offset bit lines Via programmable gate array with offset bit lines

2007-08-28

2007-08-28

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S041000

Reexamination Certificate

active

11271080

ABSTRACT:
Some embodiments provide a via programmable gate array (“VPGA”) with several configurable circuits arranged in a configurable circuit arrangement. At least some of the configurable circuits are via programmable (“VP”) configured circuits. In some embodiments, the configurable circuit arrangement is a configurable circuit arrangement that includes numerous (e.g., 50, 100, etc.) configurable circuits that are arranged in several rows and columns. This circuit arrangement also includes several bit lines, where at least one the bit line provides a configuration value to at least one configurable circuit. In some embodiments, at least some bit lines transverse along more than one column or row in the circuit arrangement.

REFERENCES:
patent: 6529040 (2003-03-01), Carberry et al.
patent: 6675309 (2004-01-01), Baxter
patent: 7193432 (2007-03-01), Schmit et al.

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