Via patterning for poly(arylene ether) used as an inter-metal di

Details Via patterning for poly(arylene ether) used as an inter-metal di Via patterning for poly(arylene ether) used as an inter-metal di

1999-03-15

2000-09-05

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438743, 216 49, H01L 21302

Patent

active

061142530

ABSTRACT:
A process for removal of residual silicon oxide hardmask used to etch vias in low-k organic polymer dielectric layers is described. The hardmask deteriorates by developing an angular aspect or faceting along the pattern edges when used to etch organic polymer layers in an oxygen/inert gas plasma in a high density plasma etcher. In addition the deterioration of the hardmask during organic polymer etching causes a significant degradation of surface planarity which would result in via-to-via shorts when a second metal layer is patterned over it if the hardmask were left in place. The residual hardmask is selectively removed immediately after the via etch by a soft plasma etch which restores surface planarity and removes via edge facets. The plasma etch has a high selectivity of oxide-to-organic polymer so that the surface irregularities are not transferred to the polymer surface and the exposed metal surface at the base of the via is also unscathed.

REFERENCES:
patent: 5482894 (1996-01-01), Havemann
patent: 5486493 (1996-01-01), Jeng
patent: 5514247 (1996-05-01), Shan et al.
patent: 5565384 (1996-10-01), Havemann
patent: 5591677 (1997-01-01), Jeng
patent: 5616959 (1997-04-01), Jeng
patent: 6040248 (2000-03-01), Chen et al.

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