Via including multiple electrical paths

Details Via including multiple electrical paths Via including multiple electrical paths

2007-01-24

2010-06-15

Purvis, Sue (Department: 2893)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S396000, C438S106000, C438S612000, C438S629000, C438S668000, C438S638000, C438S639000, C438S640000, C257S750000, C257S774000, C257SE23067

Reexamination Certificate

active

07737025

ABSTRACT:
A method for forming an plurality of paths on a substrate includes drilling an opening for a via to a depth to expose a first pad and a second pad, lining the opening with a conductive material, and insulating a first portion of the lining in the opening from a second portion of the lining in the opening to form a first electrical path contacting the first pad and a second electrical path contacting the second pad.

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patent: 2005/0252683 (2005-11-01), Hsu
patent: 2006/0081396 (2006-04-01), Hsu

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