Via connection structure with a compensative area on the...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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C257S698000

Reexamination Certificate

active

07485966

ABSTRACT:
The invention discloses a via connection structure with compensative area on a reference plane. The substrate has several conductive layers isolated by the insulation layers. When two conductive lines formed on different conductive layers where a reference plane is sandwiched in, these two conductive lines are not electrical connected because of the insulation layers. Furthermore, a via connection structure is common used to connect these two conductive lines. When a non-conductive area, i.e. the compensative area, on the reference plane is overlapped with a portion of one conductive line and is close to the via connection structure, it compensates the capacitive effect of the via connection structure. By this compensative area and the variety of the via connection structure, the vertical connection between different layers has a well impedance-matched condition and transmits the signal correctly.

REFERENCES:
patent: 4943539 (1990-07-01), Wilson et al.
patent: 6501181 (2002-12-01), Albinsson
patent: 6657130 (2003-12-01), Van Dyke et al.
patent: 7030712 (2006-04-01), Brunette et al.
patent: 7154356 (2006-12-01), Brunette et al.
patent: 7291916 (2007-11-01), Hsu et al.
patent: 7348494 (2008-03-01), Handforth et al.

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