Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2001-09-27
2003-02-11
Elms, Richard (Department: 2824)
Static information storage and retrieval
Addressing
Multiple port access
C365S154000
Reexamination Certificate
active
06519204
ABSTRACT:
FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
[Not Applicable]
BACKGROUND OF THE INVENTION
One embodiment of the present invention relates to static multi-port memories or register files. More specifically, one embodiment of the present invention relates to very small swing CMOS SRAM having a column multiplexing scheme.
Currently, memories or register files are widely used in numerous applications in various industries. Although, typically it is desirable to incorporate as many memory cells as possible into a given area, some known memories or register files are often perceived as physically too large (i.e., they take up too much silicon area) and/or are too slow for a given product definition. In addition, power dissipation is another parameter that all memory designers are forced to consider in order to make a product cost effective.
One type of basic storage memory or register file is the CMOS static random access memory (alternatively referred to as the “SRAM”), which retains its memory state without refreshing as long as power is supplied to the cell. In one embodiment of a SRAM, the memory state is usually stored as a voltage differential within a bitable functional element such as an inverter loop.
Accordingly, there is a need for a memory or register file that doesn't take up too much silicon area in comparison to known memories or register files. There is a further need for faster memory or register files with improved power dissipation in comparison to known memories or register files.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.
BRIEF SUMMARY OF THE INVENTION
One embodiment of the present invention provides improved register file or unidirectional multi-port [i.e., dedicated write port(s) and dedicated read port(s)] memories having high speed, high density and moderate power dissipation for applications in the sub 16kb (kilo bit) range when compared to currently available memories. One embodiment of the present invention increases density using, for example, a single-ended sense scheme. Using such a single-ended sense scheme saves routing channels and reduces overall transistor count in the storage element. For the applications mentioned above, the illustrated embodiment also improves read access time (higher density translates to less capacitance and hence higher speed for a given power level). Additionally, one embodiment of the present invention employs a sense amplifier technique, which reliably senses a significantly smaller static bitline swing, improving performance.
One embodiment of the present invention comprises a multi-port register file memory having at least one storage element, at least one read port coupled to the storage element and a sensing device coupled to the read port and adapted to sense a small voltage swing. The read port includes a pair of series transistors, for example NFet transistors, coupled together. The sensing device may be, for example, a sense amplifier including input offset and gain stages, where the input offset stage biases the gain stage defining a small bitline swing that is less than, or a small portion, of the total voltage supply, about 200 mV, for example.
In another embodiment, the register file memory includes a plurality of storage elements arranged in columns, where one read port is coupled to one or more of the storage elements. This embodiment may include for example, a column mux circuit coupled to one or more of the storage elements and the sensing device. In this embodiment, the read port includes a pair of series transistors and a sensing device coupled to the read port and adapted to sense a small voltage swing.
In yet another embodiment, a circuit for use with a memory having at least one storage element is contemplated. The circuit includes a read port coupled to the storage element and a sensing device coupled to the read port and adapted to sense a small voltage swing.
One embodiment for improving speed and performance is contemplated. In this embodiment, a method for improving speed and performance in a multi-port register file having a plurality of storage elements is contemplated. In this method at least one of the storage elements is selected and a small voltage swing is sensed.
Yet another embodiment is contemplated for reading data. In this embodiment, a method for reading data stored in a multi-port register file memory having a plurality of memory elements arranged in columns is contemplated. In this method, one of the columns is selected, a current flows through at least one transistor to one of the storage elements in the column, and an output of a sense amplifier connected to the column is switched to a high state.
Other aspects, advantages and novel features of the present invention, as well as details of an illustrated embodiment thereof, will be more fully understood from the following description and drawings, wherein like numerals refer to like parts.
REFERENCES:
patent: 5189640 (1993-02-01), Huard
patent: 5477489 (1995-12-01), Wiedmann
patent: 5650971 (1997-07-01), Longway et al.
patent: 5710742 (1998-01-01), Carter et al.
patent: 5724299 (1998-03-01), Podlesny et al.
Djaja Gregory
Knebelsberger David W.
Slamowitz Mark
Smith Douglas D.
Broadcom Corporation
Elms Richard
McAndrews Held & Malloy Ltd.
Phung Anh
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