Vertically-oriented semiconductor selection device for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000, C257S303000, C257S314000, C257S318000, C257S330000

Reexamination Certificate

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08076717

ABSTRACT:
A vertical semiconductor material mesa upstanding from a semiconductor base that forms a conductive channel between first and second doped regions. The first doped region is electrically coupled to one or more first silicide layers on the surface of the base. The second doped region is electrically coupled to a second silicide layer on the upper surface of the mesa. A gate conductor is provided on one or more sidewalls of the mesa.

REFERENCES:
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patent: 6300198 (2001-10-01), Aeugle et al.
patent: 7247876 (2007-07-01), Lowrey
patent: 7391664 (2008-06-01), Parkinson et al.
patent: 2004/0206996 (2004-10-01), Lee et al.
patent: 2006/0017088 (2006-01-01), Abbott et al.
patent: 2008/0035958 (2008-02-01), Asao
patent: 2008/0049486 (2008-02-01), Gruening-von Schwerin
patent: 2008/0099814 (2008-05-01), Gruening-von Schwerin et al.
patent: 2008/0224178 (2008-09-01), Pacha et al.
patent: 2008/0273369 (2008-11-01), Angerbauer et al.
patent: 2008/0277642 (2008-11-01), In T Zandt et al.

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