Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-08-28
1996-12-10
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257300, 257315, 257319, 257320, 437 43, H01L 27108, H01L 2976, H01L 29788
Patent
active
055833608
ABSTRACT:
A method for forming a vertical neuron MOSFET begins by providing a substrate (12). One or more conductive layers (24 and 28) are formed overlying the substrate (12). An opening (32) is formed through a portion of the conductive layers (24 and 28) to form one or more control electrodes from the conductive layers (24 and 28). A floating gate (36, and 38) is formed adjacent each of the control electrodes. A dielectric layer (34) is formed within the opening (32) and between the control electrodes and the floating gate (36, and 38) to provide for capacitive coupling between the control electrodes and the floating gate (36, and 38). The capacitive coupling may be altered for each control electrode via isotropic sidewall etching and other methods. By forming the neuron MOSFET in a vertical manner, a surface area of the neuron MOSFET is reduced when compared to known neuron MOSFET structures.
REFERENCES:
patent: 5045490 (1991-09-01), Esquivel et al.
patent: 5055897 (1991-10-01), Canepa et al.
patent: 5071782 (1991-12-01), Mori
patent: 5110753 (1992-05-01), Gill et al.
patent: 5120571 (1992-06-01), Gill et al.
patent: 5120672 (1992-06-01), Mitchell et al.
patent: 5250450 (1993-10-01), Lee et al.
patent: 5281548 (1994-01-01), Prall
patent: 5293328 (1994-03-01), Amin et al.
patent: 5306935 (1994-04-01), Esquivel et al.
patent: 5354702 (1994-10-01), Arima et al.
"An Intelligent MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations," by Tadashi Shibata and Tadahiro Ohmi, 1991 IEDM, pp. 919-922.
IBM Technical Disclosure Bulletin, "Nonvolatile Imaging Devices", Augusta et al., vol. 15 No. 9, pp. 2821-2822, Feb., 1973.
McFadden William C.
Pepe Alexander J.
Roth Scott S.
Motorola Inc.
Saadat Mahshid
Wallace Valencia
Witek Keith E.
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