Vertical type semiconductor with main current section and emulat

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257336, 257341, 257401, H01L 2910, H01L 2978, H01L 2702

Patent

active

054101719

ABSTRACT:
A power DMOS semiconductor device providing improved current detection accuracy can be produced using standard pocessess. The device includes main wells, subwells and a line well which is independent of the main wells and subwells. These wells are formed by doping the surface of a semiconductor substrate with well-forming impurities. The line well surrounds the subwells at a predetermined distance away from the subwells to relax an electric field on the surface of the substrate. Gate electrodes are patterned to form a line opening which surrounds the subwells. The line opening serves as a mask when forming the line well by doping the surface of the substrate with the well-forming impurities. Accordingly, the width of a region between the line well and an adjacent subwell will not fluctuate.

REFERENCES:
patent: 4414560 (1983-11-01), Lidow
patent: 4553084 (1985-11-01), Wrathall
patent: 4783690 (1988-11-01), Walden et al.
patent: 4962411 (1990-10-01), Tokura et al.
patent: 5097302 (1992-03-01), Fujihira et al.
L. Leipold and J. Tihanyi, "Experimental Study of a High Blocking Voltage Power Mosfet with Integrated Input Amplifier", IEEE, 1983, pp. 428-430.

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