Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2008-03-11
2008-03-11
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S328000, C257S331000, C257S341000
Reexamination Certificate
active
11012116
ABSTRACT:
A semiconductor device is fabricated to include a withstand-voltage assurance layer designed into a multi-dimensional super junction structure and a group of trench gate electrodes, each of which penetrating a body layer in contact with the multi-dimensional super junction structure to reach the multi-dimensional super junction structure, so that dispersions of an on-resistance of the semiconductor device can be reduced. When a position at which the group of trench gate electrodes is created is shifted in one direction, the size of an overlap area common to the group of trench gate electrodes and an n-type column changes. However, the group of trench gate electrodes is oriented in such a way that the changes in overlap-area size are minimized.
REFERENCES:
patent: 5216275 (1993-06-01), Chen
patent: 6040600 (2000-03-01), Uenishi et al.
patent: 6337498 (2002-01-01), Hasegawa et al.
patent: 6406982 (2002-06-01), Urakami et al.
patent: 6512268 (2003-01-01), Ueno
patent: 6743703 (2004-06-01), Rodov et al.
patent: 6836001 (2004-12-01), Yamauchi et al.
patent: 2001/0016369 (2001-08-01), Zandman et al.
patent: 2001/0028083 (2001-10-01), Onishi et al.
patent: 2001/0032998 (2001-10-01), Iwamoto et al.
patent: 2002/0027237 (2002-03-01), Onishi et al.
patent: 2002/0074596 (2002-06-01), Suzuki et al.
patent: 2002/0088990 (2002-07-01), Iwamoto et al.
patent: 2003/0038342 (2003-02-01), Standing
patent: 2003/0219933 (2003-11-01), Yamauchi et al.
patent: 2004/0016959 (2004-01-01), Yamaguchi et al.
patent: 2004/0084724 (2004-05-01), Kapels et al.
patent: 2004/0235272 (2004-11-01), Howard et al.
patent: 2004/0238882 (2004-12-01), Suzuki et al.
patent: 2005/0006717 (2005-01-01), Yamaguchi et al.
patent: 2005/0045874 (2005-03-01), Xiao et al.
patent: 2005/0045996 (2005-03-01), Yamauchi et al.
patent: 2005/0077572 (2005-04-01), Yamuchi et al.
patent: 2005/0133859 (2005-06-01), Kuwahara et al.
patent: A-2000-260984 (2000-09-01), None
patent: A-2001-127289 (2001-05-01), None
patent: A-2003-209123 (2003-07-01), None
Office Action issued from United States Patent Office issued on Feb. 10, 2006 for the corresponding U.S. Appl. No. 10/817,904.
Xing-Bi Chen, “Optimization of the Specific On-Resistance of the COOLMOS™”, IEEE Transactions on Electron Devices, vol. 48, No. 2, pp. 344-349, Feb. 2001 (discussed on p. 2 in the specification).
Notice of Allowance issued from the U.S. Patent Office mailed on Jun. 15, 2007 for the related U.S. Appl. No. 10/817,904.
Office Action from U.S. Patent Office issued on Nov. 22, 2006 for the corresponding U.S. Appl. No. 10/817,904.
Office Actions from Chinese Patent Office issued on Oct. 13, 2006 and Apr. 13, 2007 for the corresponding Chinese patent application No. 2004100472390.
Hattori Yoshiyuki
Kuwahara Makoto
Suzuki Mikimasa
Yamauchi Shoichi
LandOfFree
Vertical-type semiconductor device having repetitive-pattern... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical-type semiconductor device having repetitive-pattern..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical-type semiconductor device having repetitive-pattern... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3948625