Vertical transistor with high density DRAM cell and method of ma

Details Vertical transistor with high density DRAM cell and method of ma Vertical transistor with high density DRAM cell and method of ma

1995-04-24

1996-09-03

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257330, 257334, 257900, H01L 27108

Patent

active

055526209

ABSTRACT:
There is shown a method for fabricating a vertical DRAM cell which includes a field effect transistor having a gate electrode and source/drain elements and a capacitor. There is provided a pattern of field oxide isolation in a silicon substrate wherein there are a pattern of openings to the silicon substrate. A pattern is formed of bit lines and a pattern of lines of holes with a hole located within each of the openings to said silicon substrate which lines of holes and bit lines are perpendicular to one another and which the lines cross at the planned locations of the vertical DRAM cell at the pattern of openings to the silicon substrate. A gate dielectric is formed on the surfaces of the holes. A doped polysilicon layer is formed in and over the holes so that it covers the gate dielectric and the field oxide isolation. A silicon nitride layer is formed over the doped polysilicon layer. Patterning and etching is done to the silicon nitride layer and doped polysilicon layer to form the opening for the capacitor node contact to the buried source/drain of the vertical field effect transistor (switching device for the storage signal) and establish said gate electrode in the hole and word line pattern over the field oxide insulator. A silicon oxide spacer is formed over the sidewalls of the silicon nitride and doped polysilicon layer. A capacitor is formed in and over the hole to complete the vertical DRAM cell.

REFERENCES:
patent: 4651184 (1987-03-01), Malhi
patent: 4845539 (1989-07-01), Inoue
patent: 4891327 (1990-01-01), Okumura
patent: 5362665 (1994-11-01), Lu
patent: 5429977 (1995-07-01), Lu et al.
Watanabe et al., "A New Cylindrical Capacitor Using Hemispherical Grained Si (HSG-Si) for 256Mb DRAMs", IEDM, 1992, pp. 259-262.
"An Advanced Cell Structures for Dynamic RAMs" by Nicky C. C. Lu, Pub in IEEE Circuits & Device Magazine, Jan. 1989, pp. 27-36.
W. F. Richardson et al, "A Trench Transistor Cross-Point DRAM Cell", Pub in 1985 IEDM '85, pp. 714-717.

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