Vertical thin film transistor

Details Vertical thin film transistor Vertical thin film transistor

1999-05-19

2000-08-22

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257330, 257393, H01L 29786

Patent

active

061076600

ABSTRACT:
The method includes forming a first polysilicon on a substrate. Subsequently, a first dielectric layer is formed on the first polysilicon. A second polysilicon is pattern on the first dielectric layer, followed by depositing a second dielectric layer formed thereon. An etching is performed to etch the second dielectric layer, the second polysilicon layer through the first dielectric layer for generating an opening. An oxide layer is formed on the side-wall of the opening. A doped polysilicon layer is located at the lower portion of the opening. An undoped polysilicon layer is deposited on the second dielectric layer and refilled into the opening. An etching back is carried out to remove the layer over the second dielectric layer. A third polysilicon is patterned on the surface of the second dielectric layer. An isolation layer is deposited over the feature. A plurality of contact holes are generated in those isolation layers.

REFERENCES:
patent: 4902641 (1990-02-01), Koury, Jr.
patent: 5545586 (1996-08-01), Koh
patent: 5554870 (1996-09-01), Fitch et al.
patent: 5668391 (1997-09-01), Kim et al.
patent: 5780888 (1998-07-01), Maeda et al.
patent: 5994735 (1999-11-01), Maeda et al.

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