Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2007-07-23
2009-11-10
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S126000, C438S127000
Reexamination Certificate
active
07615415
ABSTRACT:
A vertical stack type multi-chip package is provided having improved reliability by increasing the grounding performance and preventing the decrease in reliability of the multi-chip package from moisture penetration into a lower semiconductor chip. The vertical stack type multi-chip package comprises an organic substrate having a printed circuit pattern on which a semiconductor chip is mounted. A first semiconductor chip is mounted on a die bonding region of the organic substrate and is electrically connected to the organic substrate through a first wire. A metal stiffener is formed on the first semiconductor chip and connected to the organic substrate by a first ground unit around the first semiconductor chip. An encapsulant is used to seal the first semiconductor chip below the metal stiffener. A second semiconductor chip, which is larger in size than that the first semiconductor chip, is mounted on the metal stiffener and connected by a second ground unit. The second semiconductor chip is connected to the organic substrate by a second wire. A mold resin seals the second semiconductor chip and a solder ball is bonded to a solder ball pad below the organic substrate.
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Kim Tae-hun
Kwon Heung-kyu
Lee Su-chang
Patton Paul E
Samsung Electronics Co,. Ltd.
Smith Zandra
Volentine & Whitt PLLC
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