Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-03-29
2002-10-15
Ho, Hoai (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S316000, C438S259000
Reexamination Certificate
active
06465836
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to split gate field effect transistor (FET) devices, as fabricated within semiconductor integrated circuit microelectronic fabrications. More particularly, the present invention relates to vertical split gate field effect transistor (FET) devices, as fabricated within semiconductor integrated circuit microelectronic fabrications.
2. Description of the Related Art
In addition to conventional semiconductor integrated circuit microelectronic fabrications having fabricated therein conventional field effect transistor (FET) devices and conventional bipolar junction transistor (BJT) devices whose transient operation provides for data storage and transduction capabilities within the conventional semiconductor integrated circuit microelectronic fabrications, there also exists within the art of semiconductor integrated circuit microelectronic fabrication non-volatile semiconductor integrated circuit microelectronic fabrications, and in particular non-volatile semiconductor integrated circuit microelectronic memory fabrications, such as but not limited to electrically erasable programable read only memory (EEPROM) non-volatile semiconductor integrated circuit microelectronic memory fabrications, whose data storage and transduction capabilities are not predicated upon transient operation.
Although non-volatile semiconductor integrated circuit microelectronic memory fabrications, such as but not limited to electrical erasable programmable read only memory (EEPROM) non-volatile semiconductor integrated circuit microelectronic memory fabrications, may be fabricated while employing any of several semiconductor integrated circuit microelectronic devices, a particularly common semiconductor integrated circuit microelectronic device fabricated within an electrically erasable programmable read only memory (EEPROM) non-volatile semiconductor integrated circuit microelectronic memory fabrication is a split gate field effect transistor (FET) device.
A split gate field effect transistor (FET) device is in part analogous in structure and operation with a conventional field effect transistor (FET) device insofar as a split gate field effect transistor (FET) device also comprises formed within a semiconductor substrate a channel region defined by a pair of source/drain regions also formed within the semiconductor substrate, wherein at least the channel region of the semiconductor substrate has formed thereupon a gate dielectric layer which separates a gate electrode from the channel region of the semiconductor substrate, but a split gate field effect transistor (FET) device is nonetheless distinguished from a conventional field effect transistor (FET) device by employing rather than a single gate electrode positioned upon the gate dielectric layer and completely covering the channel region of the semiconductor substrate: (1) a floating gate electrode positioned upon the gate dielectric layer and covering over only a portion of the channel region defined by the pair of source/drain regions (such portion of the channel region also referred to as a floating gate electrode channel region); and (2) a control gate electrode positioned over the gate dielectric layer and covering a remainder portion of the channel region while at least partially covering and overlapping the floating gate electrode while being separated from the floating gate electrode by an intergate electrode dielectric layer (such remainder portion of the channel region also referred to as a control gate electrode channel region).
In order to effect operation of a split gate field effect transistor (FET) device, particular sets of voltages are applied to the control gate electrode, the source/drain regions and the semiconductor substrate in order to induce charge, reduce charge or sense charge within the floating gate electrode (which is otherwise fully electrically isolated) and thus provide conditions under which the floating gate electrode within the split gate field effect transistor (FET) device may be programmed, erased and/or read.
While split gate field effect transistor (FET) devices are thus desirable within the art of semiconductor integrated circuit microelectronic fabrication for providing semiconductor integrated circuit microelectronic fabrications with non-volatile data storage characteristics, split gate field effect transistor (FET) devices are nonetheless not entirely without problems in the art of semiconductor integrated circuit microelectronic fabrication for providing semiconductor integrated circuit microelectronic fabrication with non-volatile data storage characteristics.
In that regard, it is known in the art of semiconductor integrated circuit microelectronic fabrication that split gate field effect transistor (FET) devices are often difficult to fabricate with enhanced areal density and enhanced performance, in part since split gate field effect transistor (FET) devices are fabricated with generally enlarged multi-region channel regions within semiconductor substrates.
It is thus desirable within the art of semiconductor integrated circuit microelectronic fabrication, and in particular within the art of semiconductor integrated circuit microelectronic memory fabrication, to provide split gate field effect transistor (FET) devices with enhanced areal density and enhanced performance.
It is towards the foregoing objects that the present invention is directed.
Various non-volatile semiconductor integrated circuit microelectronic fabrications having formed therein associated semiconductor integrated circuit microelectronic devices with enhanced areal density, as well as methods for fabrication thereof, have been disclosed within the art of non-volatile semiconductor integrated circuit microelectronic fabrication.
Generally, such non-volatile semiconductor integrated circuit microelectronic fabrications have formed therein non-volatile semiconductor integrated circuit microelectronic devices at least portions of which are formed within trenches within semiconductor substrates which comprise the non-volatile semiconductor integrated circuit microelectronic fabrications.
Examples of such non-volatile semiconductor integrated circuit microelectronic fabrications having fabricated therein non-volatile semiconductor integrated circuit microelectronic devices at least portions of which are formed within trenches within semiconductor substrates which comprise the non-volatile semiconductor integrated circuit microelectronic fabrications are disclosed within, but not limited to: (1) Hong (U.S. Pat. No. 5,703,387) (a non-volatile semiconductor integrated circuit microelectronic fabrication having fabricated therein a split gate field effect transistor (FET) device having a floating gate electrode which is formed covering completely a sidewall of a trench within a semiconductor substrate); (2) Jung Lin et al. (U.S. Pat. No. 6,087,222) (a non-volatile semiconductor integrated circuit microelectronic fabrication having fabricated therein a split gate field effect transistor (FET) device having a floating gate electrode covering only a portion of a sidewall of a trench within a semiconductor substrate); (3) Lin et al. (U.S. Pat. No. 6,093,006) (a non-volatile semiconductor integrated circuit microelectronic fabrication having fabricated therein a stacked gate field effect transistor (FET) device having a floating gate electrode covering completely a sidewall of a trench within a semiconductor substrate); and (4) Mei et al. (U.S. Pat. No. 6,130,453) (a non-volatile semiconductor integrated circuit microelectronic fabrication having fabricated therein a split gate field effect transistor (FET) device having a floating gate electrode covering completely and extending above a sidewall of a trench within a semiconductor substrate).
Desirable within the art of non-volatile semiconductor integrated circuit microelectronic fabrication, and in particular within the art of non-volatile semiconductor integrated circuit microelectronic memory fabric
Chang Chung-Li
Chu Wen-Ting
Hsieh Chia-Ta
Jung Lin Chrong
Kuo Di-Son
Ho Hoai
Huynh Andy
LandOfFree
Vertical split gate field effect transistor (FET) device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical split gate field effect transistor (FET) device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical split gate field effect transistor (FET) device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2975962