Vertical silicon-on-insulator (SOI) MOS type field effect transi

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257351, 257369, 257401, 257408, H01L 2701, H01L 2976

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active

052257010

ABSTRACT:
A MOS type field effect transistor includes a columnar insulation layer (22) formed in a concave portion of semiconductor layer (23) that is formed on a main surface of a semiconductor substrate (21). A first source or drain area (25) is formed annularly in the main surface of the substrate (21) and outwardly from an outer circumferential surface of the semiconductor layer (23), and is connected to one end of a channel (24) of the semiconductor layer (23). A second source or drain area (26) is formed on an upper end of the semiconductor layer (23), and is connected to the other end of the channel (24). A cylindrical gate electrode (28) is formed to surround the outer circumferential surface of the semiconductor layer (23). Insulation layer (22) within semiconductor layer (23) constitutes a vertical SOI device.

REFERENCES:
patent: 4670768 (1987-06-01), Sunami et al.
patent: 4975754 (1990-12-01), Ishiuchi et al.
patent: 5047812 (1991-09-01), Pfiester
patent: 5057896 (1991-10-01), Gotou
patent: 5060029 (1991-10-01), Nishizawa et al.
Hamdi et al., "Novel SOI CMOS Design Using Ultra Thin Near Intrinsic Substrate", IEDM 82, pp. 107-110.
Jean-Pierre Colinge, "Reduction of Kink Effect in Thin-Film SOI MOSFET's", IEEE Electron Device Letters, vol. 9, No. 2, Feb. 1988, pp. 97-99.

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