Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-03-29
2005-03-29
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S316000
Reexamination Certificate
active
06873009
ABSTRACT:
It is an object of the present invention to provides a field effect transistor with extremely low leakage current. It is another object of the invention to provide a semiconductor memory device having an excellent information holding characteristic. It is a further object of the invention to provide a method for manufacturing in a simple manner a novel field effect transistor or semiconductor memory device with extremely low leakage current. According to a typical basic configuration of the present invention, a thin insulating film is inserted in a vertically disposed Schottky junction to form source and drain electrodes and a tunnel of the insulating film in the junction is controlled by a gate electrode. The gate electrode is disposed on each of both sides of a vertical channel, permitting a field effect to be exerted effectively on the junction, whereby a junction leakage in an OFF state can be made extremely low.
REFERENCES:
patent: 5340754 (1994-08-01), Witek
patent: 5527723 (1996-06-01), Witek et al.
patent: 5627390 (1997-05-01), Maeda et al.
patent: 6465834 (2002-10-01), Nakazato et al.
patent: 61-67953 (1986-04-01), None
patent: 10-200001 (1998-07-01), None
J. Tucker et al, “Silicon field-effect transistor based on quantum tunneling,” Appl. Phys. Lett. 65(5), Aug. 1, 1994, pp. 618-620.
C. Wang et al, “Sub-50-nm PtSi Schottky source/drain MOSFETs,” Part of the SPIE Conference on Microelectronic Device Technology II, SPIE vol. 3506, pp 230-233.
S. Shukuri et al, “A Complementary Gain Cell Technology for Sub-1V Supply DRAMs,” IEDM 92, pp. 1006-1008.
J. Willey & Sons, “Physics of Semiconductor Devices,” Second Edition, pp. 540-553.
Terauchi et al, A Surrounding Gate Transistor (SGT) Gain Cell for Ultra Hig Density DRAMS, VLSI Technology, 1993. Digest Technical Papers. 1993 Symposium on 1993, pp. 21-22.
Hisamoto Dai
Katayama Kozo
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Pham Long
Pizarro-Crespo Marcos D.
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