Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1994-05-03
1997-04-15
Jackson, Jr., Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257328, 257341, 257342, H01L 2978
Patent
active
056212348
ABSTRACT:
This invention aims at suppressing a parasitic transistor operation of a vertical MOS device at the time of application of a noise current and improving the limitations of withstanding against destruction of the device. P base layers 3 constituting each unit cell of an n-channel DMOS device are partially connected by p extraction regions between the unit cells so as to short-circuit the p base layers to source electrodes 9 in regions Z2 through the extraction regions. Accordingly, an applied noise branches to a conventional path extending from a region Z1 to the source electrodes 9 through an n source layer 5 and a path extending from +regions Z2 to the source electrodes 9 through the p extraction regions 4. Since the p regions form one continuous region throughout the device as a whole, a local potential rise of the p base layer can be limited. Accordingly, the parasitic transistor operation can be suppressed and a breakdown voltage of the device can be improved.
REFERENCES:
patent: 4561003 (1985-12-01), Tihanyi et al.
patent: 4823176 (1989-04-01), Baliga et al.
Abstract of Japanese Application 60-29515, Dec. 1987.
English Abstract of Japanese Application 88-282702, Aug. 1990.
Jackson, Jr. Jerome
Niipondenso Co., Ltd.
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