Vertical semiconductor device and method of manufacturing the sa

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257329, 257263, H01L 2976

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active

058442731

ABSTRACT:
A vertical semiconductor device incorporates a semiconductor laminar structure including a semiconductor substrate of a first conductive type having a relatively high impurity concentration, a first semiconductor layer of the first conductive type laminated on the semiconductor substrate and having a relatively low impurity concentration, and a second semiconductor layer of the first conductive type laminated on the first semiconductor layer and having an even lower impurity concentration. A trench is formed in the semiconductor laminar structure to extend through the second semiconductor layer into the first semiconductor layer. A source region of the first conductive type is formed in a surface layer of the second semiconductor layer and the trench is filled with a gate electrode. A source electrode is formed on the source region and a drain electrode is formed on a rear surface of the semiconductor substrate.

REFERENCES:
patent: 5430315 (1995-07-01), Rumennik
patent: 5558313 (1996-09-01), Hshieh et al.
"Comparison of Ultralow Specific On-Resistance UMOSFET Structures: the ACCUFET, EXTFET, INVFET, and Conventional UMOSFET's" by Isengyou Syau et al., IEEE Transactions on Electron Devices, vol. 41, No. 5, May 1994.

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